The I/O register definitions for the CRC peripheral present in the STM32F07x and STM32F09x devices is missing some items.
1. The CRC_POLY register is not defined.
2. The CRC_CR register is missing some bits, in particular, bits 5 and 6 which define the polynomial bit width.
3. The CRC_DR (data register) should be write-accessible as either a 8, 16, or 32 bit entity.
Odds are the reason for the omissions in (1) and (2) are due to the fact that only the F07x and F09x devices support a user-programmable polynomial. On lower-end F0 devices, the polynomial is fixed to the 32-bit Ethernet standard value.
The CRC data register (CRC_DR) can be write-accessed as either a 8, 16, or 32-bit entity. The results generated will vary depending on the data width written; i.e. if one were to write 0x000000AA (32-bit write) to this register, you will get a different result than if you were to write 0xAA (8-bit write) under the same starting conditions. The 32-bit write is actually treated as a command to generate a CRC on 4 8-bit values: 0xAA, 0x00, 0x00, 0x00.
Not a major issue, but thought the developers might like to know so they can fix it in a future release.